Known synchronous rectifier circuits may be utilized, for example, to develop a rectified waveform, and include one or more synchronously-operated switches such as field effect transistors (FETs) which accomplish the rectification. Many forms of synchronous rectifier circuits exist, and one known synchronous rectifier circuit for developing a rectified waveform includes a transformer having a primary winding and a center-tapped secondary winding. This circuit includes as synchronously-operated switches n-type FETs, each having its drain connected to a separate output terminal, respectively, of the secondary winding. The sources of the FETs are connected in common, and the gate of each FET is operated by a control system which controls the commutation of each switch. The control system responds to the voltage applied across the primary winding of the transformer and generates gate control signals in accordance with the polarity, and usually magnitude, of the primary voltage. The gate control signals are 180.degree. out-of-phase relative to each other and control each FET to conduct at less than 50% duty cycle. Accordingly, when one FET is conductive (gated ON), the other FET is not conductive (gated OFF). Both FETs are also gated OFF concurrently for some period of time. Thus when polarity of the primary winding voltage waveform becomes positive in a positive-going zero crossing, i.e. with a positive slope, the n-type FET connected to the negative output terminal of the secondary winding is gated ON. When the magnitude of the primary winding voltage waveform is substantially equal to zero, both n-type FETs are gated OFF. When the polarity of the primary winding voltage waveform becomes negative in a negative-going zero crossing, i.e. with a negative slope, the n-type FET connected to the now negative output terminal of the secondary winding is gated ON. In this manner, the synchronous rectifier circuit develops a rectified waveform.
The above-described gating sequence, in practice, results in undesirable noise, waste heat generation, and excessive power losses. Specifically, every transformer has some leakage inductance. Thus, even though the magnitude of the primary winding voltage waveform may have just become zero, a positive or negative output voltage will nevertheless be present due to the leakage inductance. Therefore, the voltage waveform across the primary winding is not linearly related to the magnitude of the signals present at the secondary winding output terminals, nor is it necessarily of the same polarity. The control system, however, generates gate control signals in accordance with the primary winding voltage waveform and hence is likely to cause an FET to commutate even while it is conducting. Commutating the FET during conduction creates unwanted noise in the rectifier output voltage.
Further, even if an FET is gated OFF, the parasitic diode known to be inherent in the FET is biased to conduct if the transformer leakage inductance develops sufficient secondary voltage. With known synchronous rectifier circuits, the parasitic diode inherent in an n-type FET connected to the negative output terminal of the secondary winding is biased to conduct, for example, when the magnitude of the primary winding voltage waveform is zero and positive-going. In this condition, although the FET has been gated OFF, the leakage inductance has developed sufficient voltage to cause continued current flow through the FET via the parasitic diode. Such current in the parasitic diode is undesirable since the parasitic diode is lossy, and dissipates excessive power. Further, in order for the parasitic diode to turn off, the current in the secondary winding must reverse in order to draw the stored charge out of the diode. This produces ringing, due to the leakage inductance, which results in excessive stress on the FET in the form of a voltage across the device that may reach sufficient amplitude to cause device failure, and which also deteriorates the signal-to-noise ratio of the synchronous rectifier output signal.
Noise, waste heat generation, and power losses which occur in the above-described synchronous rectifier circuit also occur in other known synchronous rectifier circuits. For example, input voltage pulses may be supplied to the synchronously-operated switches of a synchronous rectifier circuit to develop a DC signal. In this rectifier circuit, a synchronously-operated switch connected to the pulsed voltage source is gated ON when the pulsed voltage falls to zero and the synchronously-operated switch is gated OFF while the pulsed voltage substantially equals zero. Even though the output voltage of the pulsed voltage source is substantially equal to zero, current may nevertheless still be flowing in the parasitic diodes of the synchronously-operated switch. As previously stated, however, gating the synchronously-operated switch to the OFF condition during conduction is undesirable.